Efficient Hardware Implementation of Finite Field Arithmetic AB+C for Binary Ring-LWE Based Post-Quantum Cryptography

Post-quantum cryptography (PQC) has gained significant attention from the community recently as it is proven that existing public-key cryptosystems are vulnerable to attacks launched well-developed quantum computers. The finite field arithmetic $AB+C$ , where A and C integer polynomials $B$ a binary polynomial, key component for Ring-learning-with-errors (BRLWE)-based encryption scheme (a low-complexity PQC suitable emerging lightweight applications). In this paper, we propose novel hardware implementation of through three stages interdependent efforts: (i) rigorous mathematical formulation process presented first; (ii) an efficient architecture then with detailed description; (iii) thorough also been given along comparison. Overall, proposed basic structure ( $u=1$ ) outperforms designs, e.g., involves 46.3\% less area-delay product (ADP) than \cite{b14b} $n=512$ ; design offers very performance in time-complexity can be used many future applications.